This invention relates to a signal strength detecting circuit, and more particularly, to a tuning signal strength detecting circuit in an FM receiver.
As has been known from, for example, U.S. Pat. No. 3,673,499, the detection of tuning signal strength in an FM receiver is effected by utilizing a plurality of peak-to-peak detector circuits to which are applied output signals of a plurality of cascaded stages of limiting amplifier circuit adapted to amplify an FM signal converted into an intermediate frequency and to limit the amplitude of the amplified signal.
The plurality of stages of limiting amplifier circuits execute the amplitude-limiting operations successively from the final stage, depending upon the level of a tuning signal applied to the first stage.
When the corresponding limiting amplifier circuit is in a non-limiting mode of operation, the peak-to-peak detector circuit has its detection signal level varied according to the output signal level of the limiting amplifier circuit.
Accordingly, the level of the input tuning signal is detected on the basis of the detection signals of the plurality of detector circuits. By exploiting the plurality of detector circuits corresponding to the plurality of limiting amplifier circuits in this manner, the detection range of input tuning signals can be widened.
In the detector circuit, the rectifying characteristic of the p-n junction of a semiconductor device can be utilized for the detection. In this case, the detector circuit is enabled to respond to an input signal of low level in such a way that the p-n junction is held forward-biased by e.g. a bias voltage.
The peak-to-peak detector circuit for the tuning and signal strength detecting circuit of this type is described in detail in U.S. Pat. No. 3,701,022. The plurality of peak-to-peak detector circuits are supplied with a fixed bias voltage owing to the forward voltages of a plurality of p-n junction diodes in common. On account of the deviation of the fixed bias voltage from a predetermined value, offset currents flow through the p-n junctions of the respective semiconductor devices. Therefore, the total offset current becomes great.